A conventional computer 1 is shown in FIG. 1 and comprises a CPU (central processing unit) 10, a plurality of ROM (Read-Only Memory) units 11, a plurality of RAM (Random-Access Memory) units 12, and a system bus 13. The CPU 10 controls operations of computer components and performs arithmetic and logical operations of programs installed therein. The ROM units 11 contain programs that do not need to be changed. The RAM units 12 is used to store the program being executed and data needed while the computer is being actively worked on. The system bus 13 transmits data (e.g., operation results) to an output device or reads data from a peripheral device. Typically, there is no mechanism provided for preventing the computer 1 having a single CPU 10 from shutting down abnormally. Thus, the computer 1 may shut down abnormally if either software installed therein or any of its hardware components malfunctions. As a result, the computer 1 cannot operate normally.
For solving the problem of a computer being shut down abnormally, at least two computers 2 and 3 are mounted in one of a great number of safety sensitive apparatuses, airplanes, assembly lines, and mass rapid transmits as shown in FIGS. 2 and 3. In FIG. 2, each of the two computers 2 is mounted on a mounting-socket 4 having a system bus 41, and an arbitration circuit 40 for detecting whether there is a fault in the computer 2 by either hardware or software technique, and enabling the computer 2 to control the system bus 41 based on the detection. In FIG. 3, likewise each of the three computers 3 is mounted on a mounting socket 5 having a system bus 51, and an arbitration circuit 50 for detecting whether there is a fault in the computer 3 by either hardware or software technique, and enabling the computer 3 to control the system bus 51 based on the detection. By configuring as above, it is possible of effecting a dual computer or triple (i.e., multiple) computer system for backup and being fault-tolerant, increasing system reliability, and greatly decreasing loss due to system down.
Typically, dual computer or even multiple computer system for being fault-tolerant can be classified as either software-based fault-tolerant or hardware-based fault-tolerant. One example of software-based fault-tolerant is best explained by referring to equipment of U.S. space shuttle. As shown in FIG. 2 again, a plurality of (two are shown) CPUs 20 and an expensive, advanced software-based fault-tolerant system are provided. The software-based fault-tolerant system is software having a high capacity and is adapted to perform complicated operations. Each of the CPUs 20 may activate a plurality of (e.g., at least two) different algorithms to perform calculations whenever a program is running. The arbitration circuit 40 then compares the calculation results each other by running a check program (e.g., a CRC or ECC) embedded in software in order to confirm whether there is any error in the calculations. An automatic error recovery is done when an error is detected. A hardware-based fault-tolerant system is best illustrated in FIG. 3. As shown, there are three identical computers 3 are mounted on the mounting socket 5. CPUs 30 of the computers 3 perform an operation simultaneously and transmit the operation results to the arbitration circuit 50. The arbitration circuit 50 takes a result equal to most operation results as the resulting output and sends same via the system bus 51. This hardware-based fault-tolerant system is an advantageous fault-tolerant system. However, it also has disadvantages of being expensive in the manufacturing cost, the arbitration circuit being complicated, etc. Thus, the hardware-based fault-tolerant system is typically employed in a safety sensitive or highly secret apparatus such as airplane, submarine, satellite or the like rather than being employed in general manufacturing equipment or control device.
In view of the traditional dual computer or triple computer system for backup and being fault-tolerant discussed above, CPUs of all computers perform an operation simultaneously and transmit the operation results to the arbitration circuit. The arbitration circuit takes a result equal to most operation results as a correct result and sends same to a target electronic device via the system bus. For software-based fault-tolerant system in a case of a computer being down due to hardware malfunctioning, even optimum software is useless because the CPU of the computer malfunctions. As a result, a normal operation of the computer is made impossible. This inevitably causes a great financial loss in the market. For hardware-based fault-tolerant system, its disadvantages are expensive in the hardware cost and the arbitration circuit being difficult to design which in turn may spend a great amount of money in the manufacturing. Also, educating a number of qualified engineers for designing and developing such type of fault-tolerant system is a time consuming job. Hence, such fault-tolerant systems are not applicable to general manufacturing equipment having a narrow market, general manufacturing equipment for the production of inexpensive products, or general control devices. Further, associated components are required due to the addition of a mounting socket in the typical fault-tolerant system. Furthermore, more electronic contacts are involved, resulting in an increase of the probability of malfunctioning. This in turn sacrifices reliability. As a result, the total performance of the system only increases a very few percentage. Moreover, all operation results of the computer are sent to the arbitration circuit for comparison without any communications of the operation results among computers as implemented in the typical fault-tolerant system. Thus, it is often that once the system malfunctioned, the system is unable to recover due to data loss. Thus, it is desirable to provide a novel dual computer for system backup and being fault-tolerant in order to overcome the inadequacies of the prior art.